1. Field
Example embodiments relate to a test pad structure, a pad structure for inspecting a semiconductor chip and a wiring substrate for a tape package having the same. More particularly, example embodiments relate to a test pad structure for inspecting a semiconductor chip mounted on a wiring substrate and a wiring substrate for a tape package having the same.
2. Description of the Related Art
Generally, semiconductor devices are manufactured by a fab process for forming electrical circuits including electrical elements on a semiconductor substrate, e.g., a silicon wafer, an electrical die sorting (EDS) process for inspecting electrical properties of chips formed by the fab process, and a packaging process for sealing the chips with resin, e.g., epoxy, and sorting the chips.
Through the packaging process, the semiconductor device, e.g., a semiconductor chip, is electrically connected to a mounting substrate, and the semiconductor chip is sealed to be protected from the outside. The semiconductor package including the semiconductor chip mounted on the mounting substrate dissipates heat from the semiconductor chip outside through cooling functions thereof. For example, methods of electrically connecting the semiconductor chip to the mounting substrate may include a wire bonding process, a solder bonding process, and/or a tape automated bonding (TAB) process.
The manufacturing industry for tape packages, which are used as driver integrated circuit (IC) components for flat-panel displays (FPDs), owes its growth to the development of the manufacturing industry for FPDs, e.g., liquid crystal displays (LCDs). A tape package is a semiconductor package using a tape substrate. The tape package may be classified as either a tape carrier package (TCP) or a chip-on-film (COF) package.
Generally, input/output (I/O) wiring patterns formed on the tape substrate may be used as external connection terminals in the TAB process. The I/O wiring patterns are directly adhered to a printed circuit board (PCB) or a display panel to manufacture the tape package.
In manufacturing of the tape package, an inspection process may be performed to inspect electrical properties of the semiconductor chip mounted on the tape substrate. In particular, probe needles of a probe card make contact with test pads formed on the tape substrate to inspect the semiconductor chip. The test pads are electrically connected to the I/O wiring patterns through connection leads. The test pads are spaced apart from one another by a predetermined or given distance, and the probe needles make contact with the corresponding test pads.
Recently, as the number of input/output signal lines for the semiconductor chip is increased, dimensions of the tape substrate for mounting the semiconductor chip and line widths between the wiring patterns are reduced. Accordingly, because spaces between the test pads are reduced together, thicknesses of the probe needles are required to be reduced. However, the probe needles need to have the minimum allowable thickness for reliability and endurance thereof, and thus, a test pad structure having a structure suitable for the probe card currently produced in large quantities is required.